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mp 3430 90v step - up converter with apd current monito r mp 3430 rev 1. 2 www.monolithicpower.com 1 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. description the mp3430 is a monolithic step - up converter that integrat es a power switch a nd a bias ed avalanche photodiode (apd) current monitor. the device can double the output voltage through the apd optical receivers. the mp3430 can provide up to 90v ou tput. the mp3430 uses a current - mode, fixed - frequency architecture to regulate the output voltage, which provid es a fast transient response and cycle - by - cycle current limit ing . the mp3430 features two accurate apd current monitoring outputs with 1:10 and 1 :2 ratio s, respectively . resistor - adjustable current limiting protects the apd from optical power transients. the mp3430 includes over - current and thermal - overload protection to prevent damage in the event of an output overload . the mp3430 is available in a small 3mm3mm qfn1 6 package. features ? 2.7v - to - 5.5v input voltage ? 100v / 1 ? nfet with 0.9 a limit ? up to 90v output voltage ? 50ns apd current monitoring response speed ? 1.3mhz fixed switching frequency ? internal compensation and soft - start ? high - side apd current monitor with less than 5% tolerance . ? 1:10 and 1:2 ratio outputs for apd current monitoring ? thermal - shutdown protection ? programmable apd over - current limit and protection ? 3 3mm qfn1 6 package applications ? apd bias ing ? pin diode bias ing ? optical receivers and modules ? fiber - optic C network equipment a ll mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under quality assurance. mps and the future of analog ic technology are registered tradem arks of monolithic power sys tems, inc. typical application
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 2 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. ** ordering information part number* package top marking mp3430 g q qfn16 (3x3mm) acby mp3430hq qfn16 (3x3mm) acby * for tape & reel, add suffix C z ( e. g. mp3430 g q C z). for tape & reel, add suffix C z ( e. g. mp3430 h q C z). for rohs compliant packaging, add suffix C lf (e.g. mp3430hq C lf C z) ** mps is offering two different order code s , for this device we recommend mp3430hq for our customers, both devices completely meet specifications package reference qfn16 (3x3mm) absolute maximum rat ings (1) i nput voltage ............................... - 0.3v to 6. 5v monin , sw , apd voltage .......... - 0.3v to 1 0 0v en, fb, rlim .............................. - 0.3v to 6.5v mon1, mon2 ............................... - 0.3v to 4.5 v continuous power dissipation (t a = + 25 c) (2) .... 2.1w recommended operating conditions ( 3 ) i nput voltage ................................ 2.7 v to 5.5 v mon1, mon2 ................................ ............ 2. 2 v monin , sw , apd voltage ............. 2.7 v to 90 v operating junction temp . (t j ). - 40 c to +125 c thermal resistance ( 4 ) ja jc qfn 16 ( 3 x3mm) ..................... 60 ...... 1 2 ... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), t he junction - to - ambient thermal resistance ja , and the ambient tempe rature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max) - t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into t hermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51 - 7, 4 - layer pcb. ep 1 2 3 4 12 11 10 9 13 14 15 16 8 7 6 5 p g n d v i n e n n c fb nc mon 2 agnd monin sw sw pgnd a p d n c m o n 1 r l i m top view
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 3 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. electrical character istics ( 5 ) parameters sym bol condition min typ max units minimum operati ng voltage v in min 2.7 v maximum operati ng voltage v in max 5.5 v under - voltage lockout threshold v uvlo 2. 4 2. 6 2. 7 v under - voltage lockout hysteresis v uvloh 185 mv en threshold en rising 0.8 1.6 v en hysteresis 150 m v feedback voltage v fb 0.77 0.8 0.824 v feedback line regulat or r fbl 0.043 0.12 %/v fb - pin bias current i fbb v fb = 0.8 v 30 100 na supply current i s fb=1v, not switching 0.3 1.0 ma v en =0 0.1 0.5 a switching fr equency f s 1.0 1.3 1.55 mhz maximum duty cycle d max 76 97 % switch current limit i slmt 0.6 0.9 1.3 a switch r dson v cesat i sw =150ma 0.58 0. 98 1.3 ? switch leakage current i sl sw=90v, en =0 1.0 a en pin pull - down current i enp en =0 v 0.2 a apd - current C monitor output1 gain g cm1 i apd =250na 10vmonin90v 0. 09 0. 1 0 0. 1 2 ma/ma i apd =2 .5 ma 1 0vmonin90v 0. 09 5 0. 1 0 0. 10 5 apd - current C monitor output2 gain g cm2 i apd =250na, 10vmonin90v 0.4 5 0.5 0. 6 ma/ma i apd = 2 .5 ma , 1 0vmonin90v 0.4 7 5 0. 5 0.5 3 monitor - output1 C voltage clamp v moc 250na mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 4 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. pin functions pin # name description 1, 16 pgnd power ground . pins connected internally. for best performance, connect both pins to board ground. 2 v in input supply. locally bypass this pin. 3 en shutdown. tie to 1.6 v or higher to enable device; 0. 6 v or less to disable device. 4, 6, 11 nc not connected . 5 fb feedback. connect to the output - resistor C divider tap. 7 mon2 current - monitor output . it sources a current equal to 50% of the apd current and converts to a reference voltage through an external resistor. 8 agnd analog ground . 9 rlim current - limit resistor. connect a resistor from rlim to gnd to program the apd current - limit threshold. 10 mon1 current - monitor output. it sources a current equal to 10% of the apd current and converts to a reference voltage through an external resistor. 12 apd connect to apd cathode . 13 monin current - monitor power supply. connect an external low - pass ?lter to further reduce supply voltage ripple. 14, 15 sw switch. minimize the trace length on this pin to reduce emi. exposed pad gnd. solder to a large copper plane on the pcb.
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 5 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. typical performance characteristics performance waveforms are teste d on the evaluation board in the design example section. v in = 3.3 v, v out = 5 0 v, l = 2.2 h, t a = 25 c, unless otherwise noted.
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 6 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board in the design examp le section. v in = 3.3 v, v out = 5 0 v, l = 2.2 h, t a = 25 c, unless otherwise noted.
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 7 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board in the design example section. v in = 3.3 v, v out = 5 0 v, l = 2.2 h , t a = 25 c, unless otherwise noted.
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 8 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board in the design example section. v in = 3.3 v, v out = 5 0 v, l = 2.2 h, t a = 25 c, unless otherwise noted.
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 9 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. blo ck diagram figure 1 : functional block diagram a 2 ramp generator ? r s q 1 . 2 mhz oscillator apd current mirror vin pwm comparator en fb vin sw monin rlim mon 1 mon 2 gnd apd vin gm fb fb driver error amp l 1 d 1 c out r fbb avalanche photo diode r mon 1 r mon 2 r lim r en c en vout r comp c comp 800 mv reference c in r c c c r fbt
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 10 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. application informat ion the mp3430 step - up converter uses a constant - frequency , current - mode C control scheme to provide excellent line and load regulation. at the start of each osci llator cycle, the rs latch is set, which turns on the power switch. the output of current sense amplifier which is proportional to the switching current is added to a generated ramp . the resulting sum is fed into the positive terminal of the pwm comparator . the rs latch reset s, turning off the power switch as soon as the positive terminal exceeds the level of negative input of pwm comparator which is proportional to the difference between the feedback voltage and the reference voltage. as the load varies, t he error amplifier sets the switching peak current necessary to supply the load and regulate the output voltage. mp3430 has an integrated high - side apd current monitor. the mon pin has an open - circuit protection feature and is internally clamped to 3v. mon 1 and mon2 mirror the load current on the apd pin, and convert the currents to voltage signals through resistors r mon1 and r mon2 . the current mirror ratios are set to be 1:10 and 1:2. the apd output current has over - current protection with a threshold prog rammed by an external resistor at the rlim pin. apd current - limit design the current limit can be adjusted from 0.5ma to 2.5ma. the current limit is linear with respect to the voltage applied to the rlim pin , where: to program the voltage , connect a resistor from the rlim pin to ground , where r _rlim units : k? i _rlim units : ma en design a dd a delay (typ. 1ms) to the en pin so v in can increase well beyond the uvlo value ( typ. 2. 6 v ) before the mp3430 turns on. for most applications, connect a 100k? resistor from v in to en and a 10nf capacitor from en to g nd. soft - start there is no need for a soft - start because v out rise s very slow ly on the order of ms. the portion of the inductor current that actually drives up the output voltage is small due to the high conversion ratio. the inductor current limit ( typ. 9 00ma ) , the output capacitor ( typ. 0.1f) , and v in limit the v out rise time . component design v out programming a resistor feedback network programs the output voltage. typically , the top resistor from v out to v fb is 1m?. the bottom resistor from v fb to gnd is: r top : k? r bottom : k? in addition, place a series resist or and capacit or of 100 k? and 100pf, respectively , in parallel with r top . this gives a phase boost for good phase margin as well as decreas es the gain for good gain margin in the extreme cases of v in and v out . inductor design there are three main considerations in inductor design : 1. design d3* t s to be long enough for the reverse - inductor current to stop 2. must always stay in discontin uous conduction mode (dcm) 3. the peak inductor current must be less than the current limit of the mp3430 and the saturation current of the inductor . design d3 t s to be long enough for the reverse - inductor current to stop in dcm mode there are three modes: d 1 t s : the switch is closed and current builds in the inductor, d 2 t s : when the built - up current transfer s to c out _rlim _rlim i (ma) -122 v 48 ? ? ? _rlim apd, max 68 r i ? fb bottom top out fb v rr vv ?? ?
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 11 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. d 3 t s : the l current reverses due to energy in the sw mos fet capacitor followed by lc ringing. there is a reverse current C current goin g from the sw node back into v in C during d 3 . due to the applied high - output voltage on the switch node combined with the c ds capacitive coupling of the mp3430 fet, a significant reverse current flows through the inductor during the d 3 period. the energ y stored in c ds transfer s to the inductor. this negative inductor current turns the fet body diode on. v in (combined with the negative voltage applied by the conducting body diode to the sw node) causes the inductor current to ramp up from the maximum nega tive going current to about 60% of that magnitude in the positive direction where the positive current goes from v in to the sw node , and the negative current feeds back into v in through the inductor. ringing current occurs after the current turns off the body diode. d 3 is always greater than the time for the current to turn off the fet body diode and to start ring ing . determine d 3 as per the following equations: where, , v out : v , l: h , f s : mhz , i out : ma staying in discontinuous conduction mode (dcm) the system must operate in discontinuous conduction mode (dcm) to ma intain stability due to the high conversion ratio from vin to vout. a boost converter has a right - hand zero that can cause system instability if that zero moves into the systems operational - frequency range. furthermore the right hand zero moves into lower frequencies where the system operates as the conversion ratio increases. this right - hand zero does not exist when operating in dcm stability therefore requires that the system operates in dcm under all conditions. to this end , a dimensionless parameter ca lled k measure s a system s tendency to operate in dcm mode. the other parameter is k crit which is the dcm, ccm (continuous conduction mode) system boundary. if k mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 12 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. the peak inductor current must always be less than the mp3430 curr ent limit and the inductor saturation current. in addition, chose an inductor such that the saturation current is greater than either the ic current limit ( 9 00ma , typ . ) or the worst - case calculated peak current whichever is smaller . generally, pick an inductor with at least 20% greater saturation current than the ic current limit , so that the minimum saturation current would be 1.08 a ( 9 00ma + 1 8 0ma ). to ensure that the calculated maximum current does not exceed the maximum current allo wed by the mp3430. , typical diode design due to the high - output voltage combined with the diode capacitive coupling, there is a significant reverse current through the inductor. generally, a low reverse bias capacitance equates to a low reverse inductor current. however, this is not always true though; so test the diodes prior to final selection . two recommended diodes with relatively small reverse currents are the dfls1150 - 7 (diodes inc, schottky, 1a (av g ), 1 50v) and the bat46zfilm (stmicroelectronics, schottky, 150ma (av g ), 100v) also, select a diode with an rms current rating greater than the actual rms current. the maximum rms current occurs when v in i s minim al (2.7v). the rms current equation is: d 2 = fractional diode conduction period: i diode , i pk : ma r mon1 , r mon2 design the maximum allowed voltage on either r mon1 or r mon2 is 2.5v (typ). the maximum allowed current is 2.5ma (typ). for faste r response , chose t he maximum output less than the maximum allowed voltage. w here : v mon1,max , v mon2,max < 2.5v r mon1,2 : k? i mon1,2 : ma c out design the output ripple is typically 0.1%. use 0.1f capacitor for most cases. make sure that the capacitor voltage rating is at least 50% more than v out . the ripple equation is: i apd : ma f s : mhz c out f c in design if the c in is not big e nough , the initial current pulses will pull v in down below uvlo during power start - up. this may cause false starts. select a c in of at least 10f. in 1 l,peak s vd i 900ma lf ? ?? ? 2 diode, rms rms pk d i i i 3 ? ? ? 1 in 2 out in dv d vv ? ? ? apd, max mon1, max i i 10 ? apd, max mon2, max i i 2 ? mon1, max mon1 mon1, max v r i ? mon2, max mon2 mon2, max v r i ? apd 2 out,ripple s out i (1 d ) v 0.001 fc ?? ?? ?
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 13 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. recommended values (v in : 2.7v to 5.5v) v out (v) i out,max (ma) l (h) r fb,top (m?) ( v out to fb ) r fb,bottom (k?) ( fb to gnd) diode (schottky small signal) c out (f 100v) c in (f) 30 2.5 3.3 1.0 27.4 bat46w 0.1 10 40 2.5 2.7 20.5 50 2.5 2.0 16.2 60 2.0 1.5 13.3 70 0.9 1.5 11.5 80 0.5 1.2 10.0 90 0 .5 1.0 8.87 design example: desired parameters: v in = 2.7v to 5.5v i apd,max = 2.5ma v in,typ = 3.3v v mon1,max = 0.5v v out = 50v v mon2,max = 0.5v v fb = 0.8v r top = 1m? f s = 1.3mhz; t s = 769ns calculations: v out r _rlim = 68 / i apd,max = 68 /2.5 - = 27.2 k? i nductor choose l = 2.0h first consideration (most important) so 2.0h is good. second consideration k crit >k : 0. 00 276 >0. 000 26 . third consideration: make sure the inductor has at least 2 0 % more capability than the saturation current diode d 2 = diode conduction fraction of period = 0.0365 m ake sure diode average current rating is above this value o utput capacitor choose c out = 0.1f = 0.0 4 % of v out , <0.1% ? ? ? ? ? ? ? ? ? k . . . m v v v r r fb out fb top bottom 2 16 8 0 50 8 0 1 max,reverse out i v 40pf /l 50 40pf / 2 h 224ma ? ? ? ? ? ? max,reverse re versecurrent in,min 1.6 l i 1.6 2 h 224ma t 194ns v 1 2.7 1 ?? ? ? ? ? ? ? ?? s out out 2 l f i 2 2 1.3 2.5 k 0.00026 v 1000 50 1000 ? ? ? ? ? ? ? ? ? ?? 2 2 out 1 in,min 2v k 0.00026 2 50 d 2.2 1 1 2.2 1 1 4 v 4 2.7 0.639 ?? ?? ?? ? ?? ?? ? ? ? ? ? ? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ? in 21 out in,min v 2.7 d d 0.639 0.0365 v v 50 2.7 ? ? ? ? ?? 3 1 2 d 1 d d 1 0.639 0.0365 0.325 ? ? ? ? ? ? ? 3 s re versecurrent d t 250ns t 194ns ? ? ? ? 2 in,min in,min 2 crit out out 2 crit,min out s out vv k d d' 1 vv 2.7 2.7 1 0.00276 50 50 k v 1000 0.00276 50 1000 l 21 h 2f i 2 1.3 2.5 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ?? ? ? ? ? ? ? ? in,min 1 l,peak s vd 2.7 0.639 i 664ma 900ma l f 2.0 1.3 ? ? ? ? ? ? ?? 2 diode,rms rms pk d 0.0365 i i i 664 73ma 33 ? ? ? ? ? apd 2 out,ripple s out i (1 d ) v 0.001 fc 2.5 (1 0.0365) 0.001 19mv 1.3 0.1 ?? ?? ? ?? ? ? ? ?
mp 3430 90v s tep - up converter with ap d current monitor mp 3430 rev 1. 2 www.monolithicpower.com 14 1/16/2017 mps proprietary information. patent protected . unauthorized photocopy and duplication p rohibited. ? 2017 mps. all rights reserved. m onitor resistors select v mon1 = v mon2 = 0.5v<2.5v r mon1 = v m on1 / i mon1,max = 0.5/0.25 = 2 k? r mon2 = v mon2 / i mon2,max = 0.5/1.25 = 400 ? i nput capacitors choose c in = 10f
mp 3430 90v s tep - up converter with ap d current monitor notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed u pon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp 3430 rev 1. 2 www.monolithicpower.com 15 1/16/2017 mps proprietary inform ation. patent protected . unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. package information qfn16 (3x3 mm ) side view top view 1 16 13 12 9 8 5 4 bottom view 2 . 90 3 . 10 1 . 50 1 . 80 2 . 90 3 . 10 1 . 50 1 . 80 0 . 50 bsc 0 . 18 0 . 30 0 . 80 1 . 00 0 . 00 0 . 05 0 . 20 ref pin 1 id marking 1 . 70 0 . 50 0 . 25 recommended land pattern 2 . 90 note : 1 ) all dimensions are in millimeters . 2 ) exposed paddle size does not include mold flash . 3 ) lead coplanarity shall be 0 . 10 millimeter max . 4 ) drawing conforms to jedec mo - 220 , variation veed - 4 . 5 ) drawing is not to scale . pin 1 id see detail a pin 1 id option a 0 . 30 x 45 o typ . pin 1 id option b r 0 . 20 typ . detail a pin 1 id index area 0 . 70 0 . 30 0 . 50

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